1. Field of the Invention
The present invention relates to a complementary metal-oxide semiconductor (CMOS) image sensor, and more particularly, to a CMOS image sensor and a method for fabricating the same in which transfer characteristics are improved.
2. Discussion of the Related Art
A CMOS image sensor is a semiconductor device embedded with an integrated circuit having a plurality of pixels that convert light energy into electrical signals. CMOS image sensors are widely used in digital cameras, PC cameras, fingerprint recognition systems, cellular phones, toys, spacecraft fields, image pick-up devices of subminiature flying objects, etc.
A CMOS image sensor of a 4-Tr structure is most widely used, in which one pixel is comprised of four transistors (Tr) and one photodiode. In the related art CMOS image sensor of a 4-Tr structure, since a floating diffusion node is used as an output terminal as in a charge coupled device (CCD), it is likely that problems, such as image lagging, occur. To solve such problems, a structure in which a photogate electrode is formed on a photodiode to transfer an accumulated signal to an output node has been suggested. However, if the photogate is used as a poly electrode, photo-response characteristics of a manufactured device are deteriorated. To improve photo-response characteristics, however, using a transmitting electrode causes inconvenience.
In a related art CMOS image sensor pixel of a 4-Tr structure, a transfer transistor and a photodiode are formed as shown in FIG. 1.
As shown in FIG. 1, the transfer transistor 5 of a related art CMOS image sensor pixel of a 4-Tr structure includes an isolation oxide film or gate oxide film 2 formed on a P type well 10 of a substrate. Region A is shown. The sensor pixel also includes a gate electrode 4 formed on the gate oxide film 2, and first and second source and drain regions 12 and 14 formed in the P type well by ion implantation. The first source and drain region 12 of the transfer transistor 5 corresponds to a photodiode PD region. The second source and drain region 14 of the transfer transistor 5 has a lightly doped drain (LDD) structure. The LDD structure may be formed such that insulating spacers 6 formed at sidewalls of the gate electrode 4 serve as barriers that prevent ions from being implanted into some of the substrate during ion implantation. In the transfer transistor 5, a heavily doped N+ type region and a lightly doped N− type region are formed in the second source and drain region 14 by the spacer at the left of the gate electrode 4. The N+ type region in the second source and drain region 14 has a doping concentration of 1×E20˜21/cm3 while the N− type region has a doping concentration of 1×E19˜20/cm3. Then, N type doping is performed in the first source and drain region 12 at the same concentration as that of the N-type region. This prevents leakage current of the photodiode due to heavily doping from occurring. The N type doping region is referred to as a PDN region. Next, a P− type PDP region 18 is formed by implanting P type lightly doped ions into a surface of the substrate corresponding to the photodiode PD region using the spacer at the right of the gate electrode 4 as a barrier. The PDP region 18 reduces surface leakage.
In the aforementioned related art structure, the PDN region 12 adjoining a channel region (i.e., a substrate region below the gate electrode 4) at the surface of the substrate has a relatively low concentration. Thus, charge, such as electron charge, transfer ability is not satisfactory when a channel of the transfer transistor 5 is formed. This may adversely affect characteristics of the CMOS image sensor.
The charge transfer ability may be improved by controlling the doping concentration or energy to increase the PDN concentration at the surface of a silicon substrate. However, this may directly affect unique charge storage ability of the photodiode and its photoelectron collecting ability. Therefore, it is undesirable to select a method that controls the doping concentration or energy.